JOP - Java Optimized Processor



Cyclone Board
Acex Board

LEGO MindStorms

Teaching Material



JOP is open-source under the GNU General Public License, version 3.

Actual Version

The latest version of JOP can be obtained with following git command:
	git clone git://

A snapshot of JOP is also available as .zip file:

Actual Change Log

Is part of the distribution under jop/doc/changelog.tex, see also changelog.tex.

Change Log for JOP3:

June 15, 2006 WCET analyser, enhanced memory cache interface
January 23, 2006 Special bytecodes for long/double and reference field instructions.
Long bytecodes in Java added (Peter Schrammel and Christof Pitter).
Use offset of the field instead of the index into the constant pool in field bytecodes.
January 12, 2006 Generate HW (and SW) exception and invoke JVMHelp.exception().
Additional register for internal memory addressing (ar), new microcode instructions: star, stmi, ldmi.
Removed microcode instructions: stioa, stiod, and ldiod.
December 29, 2005 Memory and IO interface changed to the SimpCon interface. AC97 core is connected via a SimpCon-Wishbone bridge.
VHDL files are in directory memory and scio. Files in directory io are now obsolete.
Eclipse projects are available for import under directory eclipse.
November 24, 2005 First implementation of a new SoC interconnect: SimpCon. Cyclone top-level is jopsc.vhd (Quartus project jopwrk). Changed the Spartan-3 Starter Kit to use SimpCon and the generic sc_sram32 memory interface (mem_xs3.vhd is now obsolete). The Spartan-3 project uses now the bytecode block cache (resulting in a performance gain of about 30% with the KFL benchmark).
November 23, 2005 Changed Quartus synthesize option 'Register packing' to avoid Quartus crash.
November 16, 2005 WISHBONE memory interface in mem_wb.vhd, wb_mem_sram32.vhd and jopwb.vhd.
November 05, 2005 Added test targets for blink.asm and testmon.asm in the Makefile. Changed testmon.asm to work with the current version of JOP.
August 25, 2005 Added a Quartus project for the new dspio board.
August 16, 2005 New .jop format: The length of the application is in the first word, the second is the pointer to the special pointer section. Download over serial line is now faster for small programs.
August 11, 2005 Addedd Flash and ModelSim targets and an example for the Flash programming in the Makefile.
The full design-flow (except the PLD config files) from the VHDL, asm and Java files up to the Flash programming of JOP and the Java application is now in the Makefile.
Correction of another bug in JOPizer (instance size).
July 31, 2005 Correction of a bug in JOPizer (wrong field info). First test cases for a JVM test framework.
July 26, 2005 Some project clean-up. Begin of a master makefile.
June 27, 2005 Simple stop-the-world garbage collector. Objects and arrays are now accessed via handles.
June 14, 2005 Added bytecode multianewarray to (+JOPizer change).
June 12, 2005 JOPizer changed and is now the default build tool.
June 09, 2005 Fix of the S3 version: Added the bsy routing through extension in the toplevel VHDL file.
Thanks to Flavius a first (test) version of JOPizer is available.
May 30, 2005 JOP is now a WISHBONE master. Add your slaves in wishbone/wb_top.vhd.
S3 version is broken.
May 9, 2005 Change cache.vhd for ModelSim. Cleanup Quartus projects. Start a full batch build from the sources (doall.bat).
May 5, 2005 Size and number of blocks of the method cache (cache.vhd) is configurable.
April 27, 2005 Invoke clinit on JVM startup. Interpret clinit with a very tiny JVM running on top of JOP to allow larger clinit methods. dup_x2.
February 20, 2005 VHDL simulation support for JOP. See Simultaion for a step-by-step explanation how to setup simulation of JOP with ModelSim.
January 17, 2005 Variable block cache with 4 blocks and 1KB (about 24% faster than the single method cache). JOP version for the Results chapter in the thesis.
December 11, 2004 Less cycles for a memory write. Enhancements in the array access (xaload, xastore).
November 16, 2004 Added Spartan-3 version (toplevel and memory interface) for the Trenz retro board.
October 17, 2004 Enhancement in mul.vhd (thanks to Kolja) and in stack.vhd to reduce the LC count.
October 01, 2004 Added Xilinx Spartan-3 version (toplevel and memory interface) for the Xilinx Starter Kit.
Sptember 16, 2004 Moved bytecode cache load from microcode to hardware. A big performance improvement for fast (32 bit) main memory.
The changes are made in mem32.vhd (for Cyclone). For the ACEX use the previous version of JOP.
Sptember 13, 2004 Reorganization of some VHDL modules (core, extension and mem) for cleaner isolation of IO and memory interface.
May 24, 2004 Changed startup of JVM: com.jopdesign.sys.Startup.boot() is called first (after Java program load). JVM initialization can be placed there. boot() invokes main().
Changed the file extension of the JOP executable from .bin to .jop. Since it is an ascii file the old name was misleading.
May 03, 2004 Added top-level VHDL files for Cyclone EP1C12.
April 07, 2004 Tuning of bytecode and microcode fetch. 10 bits ROM instead of 8 bits plus bcftbl-table.
Jopa generates an additional generic VHDL file for the microinstruction ROM (rom.vhd).
March 14, 2004 Support for long bytecodes.
February 14, 2004 Merged Xilinx version into the main distribution, directory structure changed.
Changed to actual JCC: JCC can now read compressed .jar files and works with Java 1.4.
February 12, 2004 Added microcode instructions ld_opd_8u and ld_opd_16u.
Implementation of some bytecodes (table/lookupswitch) in
February 04, 2004 Thanks to Ed Anuff JOP is now ported to Xilinx FPGAs.
The snapshot is configured for a Spartan II on a B5-X300 board.
December 05, 2003 JopSim updated, it can now simulate the timer interrupt.
Thanks to Nils Hagge a 'JOP compatible' VM (= JopSim) is available in C.
October 27, 2003 Interfaces and minimal support for long integer.
Cycle accurate interrupt for periodic tasks and first support for Ravenscar Java real-time specification.
September 15, 2003 Faster scheduling in RtThread (moved to package joprt).
String constants in .bin file (and necessary bytecodes).
August 18, 2003 Enhancement in bytecode load (about 40% speedup).
Interrupt generates special bytecode. Timer interrupt now preempts threads. java.lang.Thread and RtThread adapted. Support for monitors (synchronized(obj)).
July 11, 2003 Changed amd.c for flash download with Cyclone board.
Pin definition (cycpins_64k.tcl) for Cyclone board with 64Kx16 rams.
July 9, 2003 Changes in VHDL sources to compile JOP with Quartus II v 3.0 (work around of minor bugs in Quartus).
February 23, 2003 Changing intern RAM to full synchronous (except dout) for Cyclone port.
Should now be easy to port JOP to Xilinx. JOP runs now on Cyclone!
December 6, 2002 Enhancements in extern memory access (wait instruction).
November 8, 2002 TCPIP: Ethernet (cs8900) and slip interface work concurrent (Threads).
October 29, 2002 Java: changes in tcpip code, TFTP to program flash (a lot faster than serial line :-)
October 8, 2002 JopWriter: new method table (with virtual functions).
JVM: getfield, putfield, invokevirtual, invokespecial. new in com.jopdesign.sys.JVM.
July 28, 2002 JVM: call com.jopdesign.sys.JVM.f_xxx() on unimplemented byte codes.
=> it's possible to implement 'complex' JVM instructions in Java!
JopWeb: display inputs of baseio and set outputs in the browser.
July 26, 2002 JVM, system functions (io, mem) as special byte codes.
Some reorganization of Java files (packages).
June 28, 2002 Java: Ethernet driver for CS8900A (for new board).
March 24, 2002 VHDL: Java shift instructions are now JOP nativ instructions (single cycle).
Some enhancements in bc load from external memory.
March 22, 2002 VHDL: doing imul in 'hardware'.
March 16, 2002 VHDL/Java: Ethernet card with RTL8019AS attached to jop -> tiny Web server.
February 25, 2002 VHDL: Sigma delta ADC (external components: two Rs and one C).
January 31, 2002 Bug fix in
Very simple web server (via slip).
January 16, 2002 VHDL: simple fifo for uart.
JVM: imul, idiv, irem, ishr and a lot more Java samples.
December 10, 2001 Jop instruction set changed from 16 to 8 bit!
JVM: automatic load byte code from external memory if program does not fit in internal memory.
December 7, 2001 VHDL: muxes befor jbc and rom removed.
Java goto and ifxxx decode in bcfetch.vhd => only one JOP instruction for all Java branch types.
December 6, 2001 Some clean up in the decode stage, prepare for instruction set change.
December 4, 2001 JVM: bug in bc download corrected, more java examples.
VHDL: cp register removed (const pool is in external memory).
December 3, 2001 JVM adapted for new 'class file' (memory map). Class structs and fields in external memory, byte code still in internal. More than one (static) class works.
December 1, 2001 JopSim: a simulator for JOP's JVM, written in Java :-)
New JOPWriter for jcc to generate memory map for more objects.
November 15, 2001 Jump table for bc to JVM address mapping (but no new pipeline stage => slower max. clock).
New jp instruction instead of jp flag (not necessary with jump table).
JVM: getstatic, putstatic, newarray, arraylength, iastore, iaload, astore, aload.
October 31, 2001 Download of Java programs via serial line ('boot').
October 29, 2001 invokestatic, ireturn, return, indirect io addressing, special init bc.
October 24, 2001 Jop assembler adapted, change in bz, bnz opcode (delayed address).
July 31, 2001 Technology specific VHDL files for rams. No more .tdf files.
July 15, 2001 Prime test program is running.
June, 2001 Redesign of JOP2 => JOP3.

Change Log for JOP2:

June 11, 2001 Enhancement for local variables in the JVM.
June 10, 2001 Byte code operand fetch and branches in hardware.
June 6, 2001 Prime test program for performance tests is running.
June 4, 2001 Byte code fetch and decode in hardware, first JVM instructions ('Hallo World' and more).
May 29, 2001 Memory interface to static RAM and FLASH.
May 27, 2001 Assembler for JOP instructions.
Added Uart. Split core and memio (for simpler multi processor :-).
May 26, 2001 Core: delayed branches (is this a good idea?).
May 17, 2001 Two JOP2 fit in one ACEX EP1K30 and are running!
May 16, 2001 First working version of JOP2 (blinking LED).
April 16, 2001 First VHDL code (alu,...).
April, 2001 Redesign of JOP => JOP2.

Change Log for JOP1:

May 29, 2001 Error correction in JVM (sipush).
May 26, 2001 Byte code caching for xxx_n instructions.
January 27, 2001 Byte codes in external ram.
February 14, 2001 Enhancing memory interface (write one cycle shorter).
February 03, 2001 ECP interface added.
January 27, 2001 Change memory interface to simulate 32 bit memory with a single SRAM.
Instruction ROM now for 1024 instruction. No internal RAM in 1K30 possible.
January 14, 2001 First 'real' Java progam runs (prime).
December 27, 2000 First working version of memory interface (SRAM and FLASH).
December 3, 2000 JOP runs in real time with added serial interface (UART).
October 4, 2000 First 'program' (3 instructions) runs on JOP (with debug interface on printer port).
October 2, 2000 Creation of JOP (A lot is adapted from earlier processor designs between 1995 and 2000).

Copyright © 2000-2007, Martin Schoeberl