JOP - Java Optimized Processor

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Simulation

This page contains the information you need to get a simulation of JOP running.

There are two ways to simulate JOP:

High-level JVM simulation with JopSim.java
VHDL simulation (e.g. with ModelSim)

This page is about running a VHDL simulation with ModelSim. All simulation files are vendor independent and should run on any versions of ModelSim or a different VHDL simulator.
You can simulate JOP even with the free ModelSim XE III Starter Xilinx version.

Background Information

To simulate JOP, or any other processor design, in a vendor neutral way models of the internal memories (block RAM) and the external main memory are necessary. Beside this, only a simple clock driver is necessary.
To speed-up the simulation a little bit a simulation of the uart output, which is used for System.out.print(), is also part of the package.

The following table lists the simulation files for JOP and which program generates the initialization data:

VHDL file Function Initilization file Generator

sim_jop_types_100.vhd JOP constant definitions - -

sim_rom.vhd JVM microcode ROM mem_rom.dat Jopa.java

sim_ram.vhd Stack RAM mem_ram.dat Jopa.java

sim_jbc.vhd Bytecode memory (cache) - -

sim_memory.vhd Main memory (Java application) mem_main.dat jop2dat.java

sim_pll.vhd A dummy entity for the PLL - -

sim_uart.vhd Print characters to stdio - -

Following VHDL files have to be compiled in the following order:

    simulation/sim_jop_types_100.vhd
    simulation/sim_ram.vhd
    simulation/sim_pll.vhd
    simulation/sim_jbc.vhd
    simulation/sim_rom.vhd
    simulation/sim_memory.vhd
    simulation/sim_uart.vhd
    jtbl.vhd
    bcfetbl.vhd
    offtbl.vhd
    core/cache.vhd
    core/mem32.vhd
    core/mul.vhd
    core/extension.vhd
    core/bcfetch.vhd
    core/fetch.vhd
    core/decode.vhd
    core/shift.vhd
    core/stack.vhd
    core/core.vhd
    io/cnt.vhd
    io/iomin.vhd
    top/jopcyc.vhd
    simulation/tb_jop.vhd

The actual version of JOP (at the usual download page) now contains all necessary file to run a simulation with ModelSim (or is there another VHDL simulator available?). In directory vhdl/simulation you will find:

A test bench: tb_jop.vhd with a serial receiver to print out the messages from JOP during the simulation
Simulation versions of all memory components (vendor neutral)
Simulation of the main memory

Jopa.java has been changed to generate various mem_xxx.dat files that are read by the simulation. The JVM that is generated with jopsim.bat assumes the Java application preloaded in the main memory.
jop2dat.java generates a memory initialization file from the Java application file (package_App.jop) that is read by the simulation of the main memory (sim_memory.vhd).

In directory modelsim you will find a small batch file (sim.bat) that compiles JOP and the test bench in the correct order and starts ModelSim.

Step-by-step:

Change to directory asm to generate the JVM version for the simulation:

    jopsim

However, this batch file uses the C-preprocessor of gcc to generate the correct JVM. If gcc is not installed on your system get Cygwin.

Change to directory java/target to compile a Java test program and generate the memory files:

    doit test test Hello

Abort the download (..\..\down -e....doit.bat).

The final step is compiling the VHDL files with ModelSims vcom and run the simulation. In directory modelsim run:

sim

Comments?

Drop me a note if you have troubles running the simulation, but also if it works fine for you: martin@jopdesign.com