Java Optimized Processor
JavaTM 2 Platform, Standard Edition Java compiler and runtime.
JavaTM 2 Platform, Micro Edition (J2ME Platform) Tools for the J2ME (you need jcc).
Leonardo Spectrum VHDL synthesis for Altera FPGAs.
MAX+PLUS II BASELINE Place and route for Altera FPGAs.
Java Processors avaliable or in development
Sun anounced 1996 a Java processor. But Sun never implemented it.Sun sold licences to Fujitsu Limited, NEC Corporation, IBM Corporation and Rockwell Collins, Inc. Since 19xx the core is ‘free’ and avaliable from Sun (picoJava) in Verilog.
Advancel Logic Corp.: A soft core in Verilog. Part of JVM byte codes are executed in HW. Size of he design: 45-90 kGates.
Zucotto Wireless Inc. Another Java Processor with integrated standard periphery.
Vulcan Machines Soft core: 3,840 LCs and 10 EABs in Altera FPGA. Byte code is interpreted. Reference design on Altera development board (22% of APEX 20K400E).
Nazomi Communications Java co-processor as soft core (Verilog, 30 kGates plus 45 kBits).
Aurora VLSI, Inc. Different soft cores plus a realisation in silizium.
Derivation Systems, Inc. (DSI) LavaCORE JavaTM soft processor core, part of the Xilinx Platform FGPA initiative.
Imsys AB Cjip a softcore (?) with instrucion set for the JVM. Chip avaliable ???
Java Processors research at UniversitiesWARNING: This section contains links to files of technical reports that may be covered by copyright. Retrieving, copying, or distributing these files, however, may violate the copyright protection law.
N. Vijaykrishnan, N. Ranganathan and R. Gadekarla, 'Object-Oriented Architectural Support for a Java Processor', Lecture Notes in Computer Science 1445, pp. 330-354, Proceedings of ECOOP'98, the 12th European Conference on Object-Oriented Programming, July 1998. ecoop
N. Vijaykrishnan, 'Issues in the Design of a Java Processor Architecture', Ph.D. Dissertation, University of South Florida, July 1998. dissertation.ps
Andreas Krall, M. Anton Ertl and Michael Gschwind Krall, JavaVM Implementation: Compilers versus Hardware acac98.ps
David Gregg, M. Anton Ertl and Andreas Krall, Implementation of an Efficient Java Interpreter, Java in High Performance Computing Workshop, in Proceedings of the Java in High Performance Computing and Networking Conference, pp. 613-620, LNCS 2110, Amsterdam, June 2001. hpcn01.ps
David Gregg, M. Anton Ertl and Andreas Krall, A fast Java interpreter, in Java Optimization Strategies for Embedded Systems Workshop (JOSES), Genoa, April 2001. joses01.ps
A. Kim and J.M. Chang, "Designing A Java Microprocessor Core Using FPGA Technology", Proceedings of 1998 IEEE International ASIC Conference, Rochester, NY, Sep. 13-16, 1998. Link
Integration of Java Silicon Machine into SmartDev(ices), Proceedings of the 8th International Conference on Emerging Technolgies and Factory Automation ETFA'2001, Antibes Juan les Pins, France, October 2001 PDF
Resources for FPGA design
opencores.org VHDL and Verilog cores under GPL.
Copyright © 2000-2002, DI Martin Schoeberl